Abstract:This work focuses on the synchronization in orthogonal frequency division multiplexing (OFDM) systems, which arises to be one of the most critical operations. The OFDM system is explained in details and the synchronization problems occurring in this system are classified with the techniques used to overcome these problems. These techniques are 1-“maximum likelihood estimation” for timing and frequency offset, 2-the “Schmidl and Cox” timing and frequency offset estimation, and 3-synchronization of IEEE 802.11a standard signal or wireless LANs (WLAN). Simulation of the OFDM system was done using MATLAB and each synchronization technique was simulated under different channel models. The synchronization blocks are then synthesized, implemented and verified as digital hardware using FPGA. The verification of the synchronization techniques is based on the results obtained from MATLAB simulation. These results are considered as floating-point reference for the VHDL verification. Timing and frequency synchronizations results in VHDL of each technique were compared with the MATLAB results. The proposed synchronizer units were implemented using XILINX ISE (Integrated System Environment) on VIRTEX4 XC4VLX15 FPGA. The implemented maximum likelihood synchronizer unit takes 153639 logic gates, Schmidl and Cox synchronizer unit takes up 159333 and IEEE 802.11a double correlation synchronizer takes up 287052 logic gates from the available resources on FPGA.