Design and implementation of FPGA-based digital modem.

Basma Mohammed Saeed Waheed
Dr. Samir S. Al-Attar
Dr. Abaas Al-Shalchi

Abstract: In an attempt to keep flexibility of a programmable solution and the efficiency of dedicated solution, Field Programmable Gate Arrays (FPGAs) are beginning to emerge as a viable option. In this view, FPGAs are an attractive option for implementing digital communication systems for reasons of performance, power consumption, and reconfigurability. This work examines techniques for developing, modeling and generating FPGA implementation of QPSK modem. Amongst the more complex and demanding tasks performed in high data rate wireless communication system is synchronization. The polarity-type QPSK Costas loop has been chosen to perform coherent demodulation, and its FPGA implementation is suggested. Symbol timing recovery is addressed using differential matched filter that depends on the maximum-likelihood estimation. The proposed QPSK modem is simulated using the MathWork Matlab. The simulated system has been tested from the transmission and reception point of view in both noise-free and noisy environments. The complete system performance is verified by monitoring the carrier phase of the Costas loop in the presence of frequency shift, phase offset and timing error using computer simulation tests. These tests demonstrate that the loop operates successfully under three different convergence conditions. The most rapid convergence is achieved after approximately 10 symbols. The proposed QPSK modem is then implemented using Xilinx ISEWebPACK 8.1i (Integrated System Environment) development environment. This is after passing through simulation phases in the Active HDL 3.5 environment.Virtex-4 FPGA family is chosen to implement the proposed QPSK modem. The Virtex-4 family is the latest addition to the Virtex series that provides the most advanced logic, high performance, and highest density. As a final note for the implementation of the whole modem in a single ISE project, the required number of Virtex-4 slices is about 12870 and the modem can handle clock frequency up to 40MHz.