College of Engineering

Compression of residual speech signals using wavelet transform

Abstract : Speech Communications were a major research area in signal processing domain since the first third of the last century. As digital telephony and digital communications are evolving and advancing in efficiency and services speech coding techniques were following it to match or to make use of the new features and conditions.

English

Design and implementation of distributed control system for digital exchange

Abstract : The objective of this work is to design and implement the software and hardware of the distributed control system for digital exchange. The proposed distributed control system for digital exchange model consists of three layers which are master, slave and sub-slave layer. The practical model designed and implemented, consists of master and slave layer only. The Master-Layer of the practical model include personal computer (PC[A]) and Switching-Circuit (SC[A]). PC[A] is connected with the SC[A] through the parallel port.

English

Design and simulation of digital down converter using FPGA

Abstract : The aim of this thesis is to design and implement Digital Down Converter (DDC) using Field Programmable Gate Array (FPGA) chip for input sampling frequency of 40 MHz and 25 KHz channel bandwidth. The Xilinx FPGA is chosen here with Virtex-II device to achieve this task for the DDC system implementation. The individual components of the DDC system are the mixer with its adder/subtractor and multiplier, Numerical Controlled Oscillator (NCO), and decimation filter. These components are software implemented using VHDL language, with the software called ModelSim version SE-EE 5.4a.

English