There is an increasing need for developing efficient and practical Image Retrieval (IR) techniques, which can be used to organize the digital libraries. IR requires fast execution of computational intensive operations and the ability for the system developer. Recently, reconfigurable hardware devices in the form of the field programmable gate array (FPGA) have been proposed as a mean of high performance device at the economical price. The implementation of the image retrieval in a Spartan-XL FPGA is done using the ISE (Integrated Software Environment) Xilinx Foundation series 2.1 in the design. This work proposes two methods for designing and implementing IR system using FPGA. The first method achieves the implementation via parallel image processing. The second method achieves the implementation via serial image processing The first design offers high-speed processing operation, while the other design represents the idea of decreasing the area needed for implementation on the board of the FPGA platform. Several demonstrated examples implemented in SpartanXL series FPGA XC40XL are used to test the proposed designs. The results of evaluation with their full details that give the clue about all the parameters of interest that being studied from the cost, timing, delays, and synchronization points of view. The results indicate clearly that the implementation of parallel IR system is characterised by high speed and high cost compared with serial IR system.