The purpose of this research is to design a systolic architecture adaptive noise cancelling in the transform domain. The proposed architecture has interesting features for VLSI technology among which are local interconnection between neighboring processes and few types of cells that constructs the architecture. Another interesting feature that this proposed archi-tecture has is the high speed computation that makes its operation in real |jme applications possible The adaptive noise cancellation is carried out in the frequency domain two frequency domain adaptive algorithms, which are Fast Least Mean Square (FMLS) algorithm and Unconstrained Fast Least Mean Square (UFLMS) algorithm, are developed These two algorithms allow linear convolution between the input to the adaptive filter and its impulse response, which make them generally applicable to all adaptive applications. The former, FLMS algorithm, performs strictly linear convolution while the other one, UFLMS algorithm, allows either linear or circular convolution the two algorithms of adaptive noise cancelling in the frequency domain were mapped to systolic array using a systematic method that starts from the algorithm, modeling of the computational problem to be solved, i.e., by characterizing the problem in general form, then deducing the data dependencies between the input and intermediate variables, where the timing function and the layout geometry of array can be determined from. There might be possibly several solutions for a single problem Searching for the optimal design among the obtained solutions is done to the time and area complexities for each design solution. A computer program was written using Visual Basic 5 to simulate the operation of the proposed systolic adaptive noise canceller and check its validity.