A router is used to manage network traffic and finding the optimal route for packets to be sent. It is obvious that routers should have some information about network status, to make decision about how to send packets. The router uses "Routing algorithms" to find the best route to destination. There are different types of routing algorithms that are use to find the optimal path. In this thesis, the link state routing algorithm was used to find the optimal path from source to destination. A Programmable Logic Device (PLDs) called Field Programmable Gate array(FPGA) XC4000XV had been available for constructing the routing process . The Routing Process is implemented using FPGA device (XC40250XV) by making the proper schematic view for a given network and convert this schematic to a simple VHDL program. The software that used was Xilinx Foundation Series ISE 3.1i. The result of the work is the implementation of router process. This means deliver the input packet to its destination with least cost ( cost is taken as time delay) . The inputs to the system is the IP for destination and input packet , while the output is the output packet and the address which represents the optimal path that will use by the packet to reach its destination.