Design of electronic circuits based on parallel genetic algorithms.

Ali Usam Ahmed
Dr. Mohammed A. Abdala

Abstract: This study presents an electronic circuit design system based on Genetic Algorithm that uses SPICE to evaluate the circuit performance and compare it to the requirements. A Parallel Genetic Algorithm is used to reduce the running time as the simulator takes very long time to process a circuit. The Genetic Algorithm was implemented using the C++ programming language, to have an efficient and reliable program and to allow the use of low level functionality of the operating system. The implementation was targeted in the Windows operating system. The work focuses on the methodologies used to incorporate the SPICE into the Genetic algorithm, and to parallelize the process. A group of desktop PCs running Windows XP and connected together using a standard Ethernet office network were used in the parallelization, and a client program was installed on each one to exchange the different jobs between them. The design methods are explained in detail with flow charts describing the program code used in the implementations. The designed algorithm was used in the design of several circuits, 1st, 2nd, 6th order active low pass filters, and a CMOS operational amplifier. The results show an accurate extraction of circuit characteristics from the SPICE for different circuit types. The results also show that the importance of the algorithm increases as the complexity of the circuit increases. The parallelization achieved a speedup of about (19) times faster than a sequential implementation by using (20) processors, further speedup is expected if more processors are used.